Note: The job is a remote job and is open to candidates in USA. Highbrow Technology Inc is seeking an experienced STA Engineer to join their cutting-edge semiconductor team. The role involves performing Static Timing Analysis for complex SoC/ASIC designs and collaborating with various teams to ensure high-quality tape-out readiness.
Responsibilities
- Perform Static Timing Analysis (STA) for complex SoC/ASIC designs
- Develop and validate timing constraints (SDC)
- Analyze and resolve timing violations across all design stages
- Collaborate with Design, Physical Design, DFT, and Signoff teams
- Support timing closure and ensure high-quality tape-out readiness
Skills
- Strong hands-on experience with Static Timing Analysis (STA)
- Expertise with timing signoff tools such as Synopsys PrimeTime
- Experience in VLSI Design with a focus on STA
- Solid understanding of ASIC/SoC design flow, timing constraints, and timing closure
- Excellent problem-solving and communication skills
Company Overview
Company H1B Sponsorship